QT2022/32 - Data Sheet: DS3051
10.8.2 Reading and Writing Using the I2C Interface
To initiate read or write transactions to an MDIO register, the Device ID and Register Address must be set. Three
I2C write commands must be performed to set these values in the correct memory locations 125-127 (see Table
on page 95). Burst writing is supported.
I2C memory location 124 is the Command Status register. When there are simultaneous read requests to the
MDIO registers from both the MDIO bus and the I2C bus (slave mode), access through the I2C interface may fail
since MDIO bus access always has the highest priority. If a failure occurs, it will cause the Command Status bit 0 to
be set to ‘1’ (failed). To ensure read commands from the I2C bus are successful, always check the Command Sta-
tus register after every read.
A similar case occurs when there are simultaneous write requests from the MDIO bus and I2C bus. If a failure
occurs, it will cause the Command Status bit 1 to be set to ‘1’ (failed). To ensure write commands from the I2C bus
are successful, always check the Command Status register after every read.
Once the Register address is fully defined, an I2C read command to any address in the range 128 - 255 will return
the QT2022/32 register contents, according to the mapping in Table on page 95. For MDIO register read access,
the lower byte of the MDIO register data is latched when the upper MDIO register data byte is read i.e. the contents
of lower byte are stored until it is read. It is recommended that the upper byte be read first.
For MDIO write access, the MDIO register in the QT2022/32 will be updated after the lower byte of register data
has been written to the I2C register space. This ensures that complete words which represent a single 16 bit MDIO
register data value are kept intact. Write to the upper byte memory space first to a guarantee the proper value is
set.
The slave address for I2C access is hard-wired as 0x7E. The MDIO registers can be accessed by either the MDIO
bus or the I2C bus.
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