QT2022/32 - Data Sheet: DS3051
Bit
10GBASE-W Defect Mask Control Register 3.C010h
PCS: LOP-P Mask Enable 1, RW
0
1= defect does not propagate to PCS
0= defect propagates to PCS (default)
PCS: AIS-P Mask Enable 1, RW
1
1= defect does not propagate to PCS
0= defect propagates to PCS (default)
PCS: PLM-P Mask Enable 1, RW
1= defect does not propagate to PCS
0= defect propagates to PCS (default)
2
PCS: LOF Mask Enable 1, RW
3
1= defect does not propagate to PCS
0= defect propagates to PCS (default)
Tx RDI-P: PLM-P Mask Enable 2, RW
1= defect does not assert RDI-P
0= defect asserts RDI-P (default)
4
Tx RDI-P: LCD-P Mask Enable 2, RW
1= defect does not assert RDI-P
0= defect asserts RDI-P (default)
5
Tx RDI-P: AIS-P Mask Enable 2, RW
1= defect does not assert RDI-P
0= defect asserts RDI-P (default)
6
Tx RDI-P: LOP-P Mask Enable 2, RW
1= defect does not assert RDI-P
0= defect asserts RDI-P (default)
7
Tx RDI-L: AIS-L/LOS/LOF Mask Enable 2, RW
1= defect does not assert RDI-L
8
0= defect asserts RDI-L (default)
Tx RDI-L: WIS Sync Mask Enable 2, RW
1= defect does not assert RDI-L
0= defect asserts RDI-L (default)
9
Tx RDI-P: RDI-L Mask Enable 2, RW
1= RDI-L alarm does not trigger RDI-P alarm
0= defect asserts RDI-P (default)
10
15-11
Reserved, RO
1. By default, this defect propagates to the PCS layer of the device. The PCS will generate a local fault signal on the XAUI output to the
upstream MAC.
2. When this defect is detected on the receive input, an RDI-x defect is sent in the transmit WIS overhead by default. When masked, the
RDI-x defect is not sent.
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