Revision 1.23 - Sept 26, 2006
Data Sheet
PowerPC 440SP Embedded Processor
Table 14. I/O Specifications—All Speeds
(Sheet 1 of 3)
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
2. PCI-X timings are for asynchronous operation up to 133.33MHz. PCI-X input setup time requirement is 1.2ns for 133.33MHz
and 1.7ns for 66.66MHz. PCI timings (in parentheses) are for asynchronous operation up to 66.66MHz. PCI output hold time
requirement is 1ns for 66.66MHz and 2ns for 33.33MHz.
3. These are DDR signals that can change on both the positive and negative clock transitions.
Input (ns)
Output (ns)
Output Current (mA)
I/O H I/O L
(minimum) (minimum)
Signal
Clock
Notes
Setup Time Hold Time Valid Delay
Hold Time
(TOH min)
(TIS min)
(TIH min)
(TOV max)
PCI-X Interfaces
PCIX0:2Ack64
PCIX0:1AD63:00
PCIX2AD31:00
PCIX0:1BE7:0
PCIX2BE3:0
Note 2 (2)
Note 2 (2)
0.5(0)
0.5(0)
3.5(6)
3.5(6)
0.7 (Note 2)
0.7 (Note 2)
0.5
0.5
1.5
1.5
PCIX0:2Clk
PCIX0:2Clk
2
2
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
PCIX0:2Clk
2
PCIX0:2CalG0:1
PCIX0:1CalR0:1
PCIX0:2Cap
Note 2 (2)
dc
0.5(0)
dc
na
na
na
na
na
na
2
na
na
async
Note 2 (2)
Note 2 (2)
Note 2 (2)
na
0.5(0)
0.5(0)
0.5(0)
na
3.5(6)
3.5(6)
3.5(6)
3.5(6)
3.5(6)
3.5(6)
3.5(6)
3.5(6)
3.5(6)
na
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
na
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
na
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
na
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
PCIX0:2Clk
PCIX0:2DevSel
PCIX0:2ECC5:2
PCIX0:2Frame
PCIX0:2Gnt0
PCIX0:2Gnt1
PCIX0:1Gnt2:3
PCIX0:2IDSel
PCIX0:2INTA
PCIX0:2IRDY
PCIX0:1M66En
PCIX0:2Par
na
na
na
na
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
3.5(6)
3.5(6)
3.5(6)
na
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
na
0.5
0.5
0.5
na
1.5
1.5
1.5
na
PCIX0:1Par64
PCIX0:2PErr
na
na
na
na
PCIX0:1Req0
PCIX0:1Req1:3
PCIX2Req1
na
na
na
na
na
na
na
na
na
na
PCIX0:2Clk
2
PCIX0:2Req64
PCIX0:2Reset
PCIX0:2SErr
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
3.5(6)
3.5(6)
3.5(6)
3.5(6)
3.5(6)
3.5(6)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.5
0.5
0.5
0.5
0.5
0.5
1.5
1.5
1.5
1.5
1.5
1.5
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
PCIX0:2Clk
2
2
2
2
2
2
PCIX0:2Stop
PCIX0:2TRDY
PCIX0:2VC
72
AMCC Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
