Revision 1.23 - Sept 26, 2006
Data Sheet
PowerPC 440SP Embedded Processor
Table 12. Clocking Specifications
Symbol
SysClk Input
FC
Parameter
Min
Max
Units
Frequency
Period
33.33
83.33
30
MHz
ns
TC
12
TCS
TCH
TCL
Edge stability (cycle-to-cycle jitter)
–
±0.15
ns
High time
Low time
40% of nominal period
40% of nominal period
60% of nominal period
60% of nominal period
ns
ns
Note:Input slew rate ≥ 1V/ns
PLL VCO
FC
TC
Frequency
Period
600
1333.33
1.66
MHz
ns
0.75
Processor Clock (CPU Clock)
FC
TC
Frequency
Period
400
1.5
666.66
2.5
MHz
ns
MemClkOut
FC
Frequency
Period
200
333.33
MHz
ns
TC
3
5
TCH
High time
45% of nominal period
55% of nominal period
ns
OPB Clock and PerClk
FC
TC
Frequency
Period
–
83.33
–
MHz
ns
12
MAL Clock
FC
Frequency
Period
45
12
83.33
22.2
MHz
ns
TC
Figure 4. Clock Timing Waveform
T
T
CL
CH
T
C
68
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AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
