Revision 1.07 – October 4, 2007
440GP – Power PC 440GP Embedded Processor
Data Sheet
Revision Log
Date
Contents of Modification
08/07/2002
08/30/2002
09/11/2002
10/22/2002
11/20/2002
01/07/2003
01/22/2003
03/25/2003
06/16/2003
08/22/2003
01/21/2004
02/12/2004
05/12/2004
07/8/2004
Add revision log.
Change EMC0:1TxD0:1 and EMC0:1TxEn TOV from 15 to 11 ns.
Update for 466 and 500 MHz parts
Add heat sink mounting information and additional part numbers for E temperature range.
Update I/O timing data.
Update PCI-X I/O voltage specification.
Correct description of SysReset signal.
Update DDR SDRAM timing.
Change PCI setup specification from 2 to 3ns.
Remove references to 2xPLB in DDR SDRAM timing section.
Update DDR SDRAM timing section to be consistent 440GX presentation.
Restore VDD/OVDD voltage sequence restriction.
Add plastic package data and update part number list.
Update supported part numbers.
Add information on minimum SysClk and TRST duration during power-on reset.
Remove power sequence restrictions note from Absolute Maximum Rating table.
Restate power sequencing restrictions in Recommended DC Operating Conditions table.
Convert to AMCC format.
11/01/2004
12/09/2004
06/07/2005
10/17/2005
Remove references to Ethernet SMII mode.
Add reduced-lead part numbers.
Clarify DDR SDRAM interface diagram.
Remove metal-layer specification from technology description.
Add logo and number nomenclature to package drawing.
11/07/2005
08/30/2007
Change the technical support telephone and fax number.
AMCC
81