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PPC440GP-3RC400C 参数 Datasheet PDF下载

PPC440GP-3RC400C图片预览
型号: PPC440GP-3RC400C
PDF下载: 下载PDF文件 查看货源
内容描述: 的Power PC 440GP嵌入式处理器 [Power PC 440GP Embedded Processor]
分类和应用: 微控制器和处理器外围集成电路微处理器PC时钟
文件页数/大小: 83 页 / 1393 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 1.07 – October 4, 2007  
440GP – Power PC 440GP Embedded Processor  
Data Sheet  
Spread Spectrum Clocking  
Care must be taken when using a spread spectrum clock generator (SSCG) with the PPC440GP. This controller  
uses a PLL for clock generation inside the chip. The accuracy with which the PLL follows the SSCG is referred to  
as tracking skew. The PLL bandwidth and phase angle determine how much tracking skew there is between the  
SSCG and the PLL for a given frequency deviation and modulation frequency. When using an SSCG with the  
PPC440GP the following conditions must be met:  
• The frequency deviation must not violate the minimum clock cycle time. Therefore, when operating the  
PPC440GP with one or more internal clocks at their maximum supported frequency, the SSCG can only lower  
the frequency.  
• The maximum frequency deviation cannot exceed 3%, and the modulation frequency cannot exceed 40kHz.  
In some cases, on-board PPC440GP peripherals impose more stringent requirements.  
• Use the Peripheral Bus Clock for logic that is synchronous to the peripheral bus since this clock tracks the  
modulation.  
• Use the DDR SDRAM MemClkOut since it also tracks the modulation.  
Notes:  
1. The serial port baud rates are synchronous to the modulated clock. The serial port has a tolerance of  
approximately 1.5% on baud rate before framing errors begin to occur. The 1.5% tolerance assumes that  
the connected device is running at precise baud rates.  
2. Ethernet operation is unaffected.  
3. IIC operation is unaffected.  
Important: It is up to the system designer to ensure that any SSCG used with the PPC440GP meets the above  
requirements and does not adversely affect other aspects of the system.  
AMCC  
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