Revision 1.07 – October 4, 2007
440GP – Power PC 440GP Embedded Processor
Data Sheet
Peripheral Interface Clock Timings (Continued)
Parameter
Min
Max
Units
MHz
ns
Notes
TmrClk input frequency
TmrClk period
–
100
10
–
TmrClk input high time
TmrClk input low time
Notes:
40% of nominal period
40% of nominal period
60% of nominal period
60% of nominal period
ns
ns
1. TOPB is the period in ns of the OPB clock. The internal OPB clock runs at 1/2the frequency of the PLB clock. The maxi-
mum OPB clock frequency is 66.66 MHz.
2. When the PCI-X interface is used to support a legacy PCI interface, the maximum PCIXClk frequency is 66.66MHz.
AMCC
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