Revision 1.27 - August 22, 2007
PPC405EZ – PowerPC 405EZ Embedded Processor
Preliminary Data Sheet
Table 13. System Clocking Specifications
Symbol
CPU
Parameter
Min
Max
Units
PFC
Processor clock frequency (must be ≥ SCFC)
133.33
416
MHz
SysClk Input
SCFC
Frequency
33.33
na
100
± 0.1
na
MHz
ns
SCTCS
SCTCH
SCTCL
SCRT
Edge stability (phase jitter, cycle to cycle)
Input high time
0.6
0.6
na
ns
Input low time
na
ns
Rise time
0.4
ns
Note: Input slew rate = 1V/ns
TrcClk Output
TCFC
PFC/2
± 0.2
Clock output frequency
MHz
ns
TCTCS
Clock edge stability (phase jitter, cycle to cycle)
Other Clocks
VCOFC
VCO frequency
PLB frequency
OPB frequency
600
33
1333.33
166
MHz
MHz
MHz
PLBFC
OPBFC
33
83
Figure 3. Clocking Waveform
2.0V
1.5V
0.8V
T
T
CL
CH
T
C
AMCC Proprietary
45
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
