Revision 1.27 - August 22, 2007
PPC405EZ – PowerPC 405EZ Embedded Processor
Preliminary Data Sheet
Table 9. Recommended DC Operating Conditions
Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended
conditions can affect device reliability.
Parameter
Logic Supply Voltage
Symbol
Minimum
+1.425
+3.0
Typical
+1.5
Maximum
+1.575
+3.6
Unit
V
Notes
VDD
OVDD
OVDD
1
2
I/O Supply Voltage (for non-EBC I/O)
I/O Supply Voltage (for EBC I/O)
+3.3
V
+3.6
+3.0
+3.3
V
1
(see Note 1)
PLL_AVDD
ADC_AVDD
DAC_AVDD
VIL
PLL Analog Supply Voltage
ADC Analog Supply Voltage
DAC Analog Supply Voltage
I/O Input Low (3.3V LVTTL)
I/O Input High (3.3V LVTTL)
I/O Output Low (3.3V LVTTL)
I/O Output High (3.3V LVTTL)
I/O High (USB, 5V tolerant)
I/O Low (USB, 5V tolerant)
I/O Input High (IIC)
+1.4
+3.135
+3.135
0
+1.5
+3.3
+3.3
+1.6
+3.465
+3.465
+0.8
V
V
V
V
V
V
V
V
V
V
V
V
V
VIH
+2.0
0
+3.6
VOL
+0.4
VOH
+2.4
+2.8
+3.6
VOH
VOL
+0.3
VIH
0.7OVDD
OVDD + 0.3
+0.3OVDD
VIL
I/O Input Low (IIC)
−0.3
VIH
I/O Output High (IIC)
VOL
I/O Output Low (IIC)
0
0
+0.4
0
Input Leakage Current
(no pull-up or pull-down)
IIL1
IIL2
μA
μA
V
Input Leakage Current
(with internal pull-down)
0
200
I/O Maximum Allowable Overshoot
(3.3V LVTTL)
VMAO
+3.9
I/O Maximum Allowable Undershoot
(3.3V LVTTL)
VMAU
TC
−0.6
−40
V
Case Temperature
+105
°C
Notes:
1. When using CRAM or PSRAM memory on the EBC interface, this voltage must be limited to a maximum of +3.3V. This is a limitation
imposed by the CRAM/PSRAM devices, not the PPC405EZ.
Table 10. Input Capacitance
Parameter
Symbol
Maximum
1.9
Unit
pF
Notes
CIN1
3.3V LVTTL I/O
USB 5V Tolerant I/O
IIC I/O
CIN2
CIN3
3.2
pF
5.8
pF
AMCC Proprietary
43
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
