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CS5320 参数 Datasheet PDF下载

CS5320图片预览
型号: CS5320
PDF下载: 下载PDF文件 查看货源
内容描述: PCI匹配制造商, 3.3V [PCI Match Maker, 3.3V]
分类和应用: PC
文件页数/大小: 160 页 / 1544 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 5.03 – June 14, 2006  
S5320 – PCI Match Maker: PCI Configuration Registers  
Data Sheet  
Base Address Register (BADR)  
Determining Base Address Size  
The address space defined by a given base address  
register is determined by writing all 1s to a given base  
address register from the PCI bus and then reading  
that register back. The number of 0s returned starting  
from D4 for memory space and D2 for I/O space  
toward the high-order bits reveals the amount of  
address space desired. Tables 25 and 26 list the pos-  
sible returned values and their corresponding size for  
both memory and I/O, respectively.  
Base Address  
Register Name:  
Address Offset:  
10h, 14h, 18h, 1Ch, 20h  
FFFFFF81h for offset 10h;  
00000000h for all others  
Power-up value:  
Boot-load:  
External nvRAM offset 050h, 54h,  
58h, 5Ch, 60h (BADR0-4)  
high bits Read/Write; low bits Read  
Only  
Included in the tables are the nvRAM/EPROM boot  
values which correspond to a given assigned size. A  
register returning all 0s indicates the region is  
disabled.  
Attribute:  
Size:  
32 bits  
Assigning the Base Address  
Base address registers are used by the system BIOS  
to determine how much memory or I/O address space  
a region requires in host space. The actual memory or  
I/O location(s) of the space is determined by interro-  
gating these registers after BIOS power-up  
initialization. Bit zero of each field is used to select  
whether the space required is to be decoded as mem-  
ory (bit 0 = 0) or I/O (bit 0 = 1). Since this PCI device  
has internal operating registers, the Base Address  
Register at offset 10h is assigned to them. The  
remaining four base address registers can only be  
used by boot-loading them from the external nvRAM  
interface.  
After a base address has been sized, the BIOS can  
physically locate it in memory (or I/O) space. The base  
address value must be on a natural binary boundary  
for the required size. For example, if the first base  
address register returns FFFFFF81h indicating an I/O  
space (D0=1) of size 80h. This means that the 5920’s  
internal registers can be selected for I/O addresses  
between 00000300h through 0000037Fh, in this  
example. (example 300h, 380h etc.; 338h, 340h would  
not be allowable).  
AMCC Confidential and Proprietary  
DS1656  
45  
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