8–2
Chapter 8: Using MAX II Devices in Multi-Voltage Systems
I/O Standards
I/O Standards
The I/O buffer of MAX II devices is programmable and supports a wide range of I/O
voltage standards. Each I/O bank in a MAX II device can be programmed to comply
with a different I/O standard. All I/O banks can be configured with the following
standards:
■
■
■
■
3.3-V LVTTL/LVCMOS
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.5-V LVCMOS
The Schmitt trigger input option is supported by the 3.3-V and 2.5-V I/O standards.
The I/O Bank 3 also includes 3.3-V PCI I/O standard interface capability on the
EPM1270 and EPM2210 devices. See Figure 8–1.
Figure 8–1. I/O Standards Supported by MAX II Device (Note 1), (2), (3), (4), (5)
I/O Bank 2
I/O Bank 3
also supports
the 3.3-V PCI
I/O Standard
All I/O Banks support
■ 3.3-V LVTTL/LVCMOS
■ 2.5-V LVTTL/LVCMOS
■ 1.8-V LVTTL/LVCMOS
I/O Bank 1
I/O Bank 3
■ 1.5-V LVCMOS
Individual
Power Bus
I/O Bank 4
Notes to Figure 8–1:
(1) Figure 8–1 is a top view of the silicon die.
(2) Figure 8–1 is a graphical representation only. Refer to the pin list and the Quartus® II software for exact pin locations.
(3) EPM240 and EPM570 devices only have two I/O banks.
(4) The 3.3-V PCI I/O standard is only supported in EPM1270 and EPM2210 devices.
(5) The Schmitt trigger input option for 3.3-V and 2.5-V I/O standards is supported for all I/O pins.
MAX II Device Handbook
© October 2008 Altera Corporation
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