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EPM240T100C5N 参数 Datasheet PDF下载

EPM240T100C5N图片预览
型号: EPM240T100C5N
PDF下载: 下载PDF文件 查看货源
内容描述: [暂无描述]
分类和应用: 可编程逻辑器件输入元件PC
文件页数/大小: 295 页 / 3815 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Chapter 13: IEEE 1149.1 (JTAG) Boundary-Scan Testing for MAX II Devices
IEEE Std. 1149.1 BST Operation Control
13–11
During the capture phase, multiplexers preceding the capture registers select the
active device data signals; this data is then clocked into the capture registers. The
multiplexers at the outputs of the update registers also select active device data to
prevent functional interruptions to the device. During the shift phase, the boundary-
scan shift register is formed by clocking data through capture registers around the
device periphery and then out of the
TDO
pin. New test data can simultaneously be
shifted into
TDI
and replace the contents of the capture registers. During the update
phase, data in the capture registers is transferred to the update registers. This data can
then be used in the
EXTEST
instruction mode.
Refer to
for more information.
shows the
SAMPLE/PRELOAD
waveforms. The
SAMPLE/PRELOAD
instruction code is shifted in through the
TDI
pin. The TAP controller advances to the
CAPTURE_DR
state and then to the
SHIFT_DR
state, where it remains if
TMS
is held
low. The data shifted out of the
TDO
pin consists of the data that was present in the
capture registers after the capture phase. New test data shifted into the
TDI
pin
appears at the
TDO
pin after being clocked through the entire boundary-scan register.
shows that the test data that shifted into
TDI
does not appear at the
TDO
pin until after the capture register data that is shifted out. If
TMS
is held high on two
consecutive
TCK
clock cycles, the TAP controller advances to the
UPDATE_DR
state for
the update phase.
If the device output enable feature is enabled but the
DEV_OE
pin is not asserted
during boundary-scan testing, the OE boundary-scan registers of the boundary-scan
cells capture data from the core of the device during
SAMPLE/PRELOAD.
These values
are not high impedance, although the I/O pins are tri-stated.
Figure 13–9.
SAMPLE/PRELOAD Shift Data Register Waveforms
TCK
TMS
TDI
TDO
SHIFT_IR
TAP_STATE
EXIT1_IR
Instruction Code
SELECT_DR_SCAN
Data stored in
UPDATE_IR
CAPTURE_DR
boundary-scan
register is shifted
out of TDO.
After boundry-scan
register data has been
shifted out, data
entered into TDI will
shift out of TDO.
EXIT1_DR
UPDATE_DR
SHIFT_DR
EXTEST Instruction Mode
The
EXTEST
instruction mode is used primarily to check external pin connections
between devices. Unlike the
SAMPLE/PRELOAD
mode,
EXTEST
allows test data to be
forced onto the pin signals. By forcing known logic high and low levels on output
pins, opens and shorts can be detected at pins of any device in the scan chain.
shows the capture, shift, and update phases of the
EXTEST
mode.