Chapter 13: IEEE 1149.1 (JTAG) Boundary-Scan Testing for MAX II Devices
IEEE Std. 1149.1 Boundary-Scan Register
13–5
shows the User I/O Boundary-Scan Cell of MAX II devices.
Figure 13–4.
MAX II Device’s User I/O BSC with IEEE Std. 1149.1 BST Circuitry
SDO
INJ
0
1
D
Q
Input
PIN_IN
OEJ
0
1
From or To Device
I/O Cell Circuitry
And/Or Logic Core
OUTJ
0
1
D
Q
Output
D
Q
Output
D
OE
Q
D
OE
Q
0
1
0
1
PIN_OE
0
1
PIN_OUT
Output
Buffer
Pin
SHIFT
CLOCK
UPDATE
HIGHZ MODE
Global
Signals
SDI
Capture
Registers
Update
Registers
describes the capture and update register capabilities of all boundary-scan
cells within MAX II devices.
Table 13–2.
MAX II Device’s Boundary-Scan Cell Descriptions
Captures
Output
Capture
Register
OUTJ
OE Capture
Register
OEJ
Input Capture
Register
PIN_IN
Output
Update
Register
PIN_OUT
Drives
OE Update
Register
PIN_OE
Input Update
Register
—
Pin Type
User I/O
Notes
Includes
User Clocks
Note to
(1)
TDI, TDO, TMS,
and
TCK
pins, and all VCC and GND pin types do not have boundary-scan cells.
JTAG Pins and Power Pins
MAX II devices do not have boundary-scan cells for the dedicated JTAG pins (TDI,
TDO, TMS,
and
TCK)
and power pins (VCCINT,
VCCIO, GNDINT,
and
GNDIO).
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