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EPF10K30RC208-3 参数 Datasheet PDF下载

EPF10K30RC208-3图片预览
型号: EPF10K30RC208-3
PDF下载: 下载PDF文件 查看货源
内容描述: 嵌入式可编程逻辑器件系列 [Embedded Programmable Logic Device Family]
分类和应用: 可编程逻辑器件输入元件LTE时钟
文件页数/大小: 128 页 / 1975 K
品牌: ALTERA [ ALTERA CORPORATION ]
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FLEX 10K Embedded Programmable Logic Device Family Data Sheet  
Notes to tables:  
(1) Microparameters are timing delays contributed by individual architectural elements. These parameters cannot be  
measured explicitly.  
(2) Operating conditions:  
V
V
V
V
V
V
= 5.0 V ± 5% for commercial use in FLEX 10K devices.  
= 5.0 V ± 10% for industrial use in FLEX 10K devices.  
= 3.3 V ± 10% for commercial or industrial use in FLEX 10KA devices.  
= 3.3 V ± 10% for commercial or industrial use in FLEX 10K devices.  
= 2.5 V ± 0.2 V for commercial or industrial use in FLEX 10KA devices.  
= 2.5 V, 3.3 V, or 5.0 V.  
CCIO  
CCIO  
CCIO  
CCIO  
CCIO  
CCIO  
(3) Operating conditions:  
(4) Operating conditions:  
(5) Because the RAM in the EAB is self-timed, this parameter can be ignored when the WEsignal is registered.  
(6) EAB macroparameters are internal parameters that can simplify predicting the behavior of an EAB at its boundary;  
these parameters are calculated by summing selected microparameters.  
(7) These parameters are worst-case values for typical applications. Post-compilation timing simulation and timing  
analysis are required to determine actual worst-case performance.  
(8) External reference timing parameters are factory-tested, worst-case values specified by Altera. A representative  
subset of signal paths is tested to approximate typical device applications.  
(9) Contact Altera Applications for test circuit specifications and test conditions.  
(10) These timing parameters are sample-tested only.  
Figures 29 and 30 show the asynchronous and synchronous timing  
waveforms, respectively, for the EAB macroparameters in Table 34.  
Figure 29. EAB Asynchronous Timing Waveforms  
EAB Asynchronous Read  
WE  
Address  
a0  
a1  
a2  
a3  
tEABAA  
tEABRCCOMB  
Data-Out  
d0  
d1  
d2  
d3  
EAB Asynchronous Write  
WE  
tEABWP  
tEABWDSU  
tEABWDH  
din0  
din1  
Data-In  
tEABWASU  
tEABWAH  
tEABWCCOMB  
a0  
a1  
a2  
Address  
tEABDD  
Data-Out  
din0  
din1  
dout2  
64  
Altera Corporation  
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