Package
Figure 2–8. PCB Routing for 88-Pin Ultra FineLine BGA Package Note (1)
DCLK
DQ7
DQ5
VCC
DQ3
NC
OE
VCC
A20
A16
A11
A8
A15
A10
A14
A9
A13
A12
PGM0
DQ6
GND
DQ14
DQ4
VCC
DQ2
DATA7
DATA5
DATA4
DATA3
DATA2
NC
C-WE#
(2)
DQ15
DQ13
DQ12
VCC
DATA6
nINIT
TCK
TDI
F-WE#
(2)
RY/BY#
PGM1
VCC
DQ11
CONF
F-RP#
(2)
GND
TM1
A19
C-RP#
(2)
WP#
TDO
VCCW
DQ10
(3)
TMS
nCS
NC
NC
PGM2
A7
PORSEL
A6
DQ9
A3
DQ8
A2
DQ0
A1
DQ1
VCC
DATA1
GND
VCC
NC
A18
A17
DATA0
NC
GND
EXCLK
A5
A4
A0
CE#
GND
OE#
TM0
GND
Notes to Figure 2–8:
(1) If the external flash interface feature is not used, then the flash pins should be left unconnected since they are
internally connected to controller unit. The only pins that need external connections are WP#, WE#, and RP#. If the
flash is being used as an external memory source, then the flash pins should be connected as outlined in the pin
descriptions section.
(2) F-RP#and F-WE#are pins on the flash die. C-RP#and C-WE#are pins on the controller die. C-WE#and F-WE#
should be connected together on the PCB. F-RP#and C-RP#should also be connected together on the PCB.
(3) WP#(write protection pin) should be connected to a high level (3.3 V) to be able to program the flash bottom boot
block, which is required when programming the device using the Quartus II software.
Package Layout Recommendation
EPC16 and EPC8 enhanced configuration devices in the 100-pin PQFP
packages have different package dimensions than other Altera 100-pin
PQFP devices (including EPC4). Figure 2–9 shows the 100-pin PQFP PCB
footprint specifications for enhanced configuration devices that allows
for vertical migration between all three devices. These footprint
dimensions are based on vendor-supplied package outline diagrams.
2–34
Altera Corporation
August 2005
Configuration Handbook, Volume 2
ALTERA [ ALTERA CORPORATION ]
