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EPC16QI100 参数 Datasheet PDF下载

EPC16QI100图片预览
型号: EPC16QI100
PDF下载: 下载PDF文件 查看货源
内容描述: 2.增强型配置器件( EPC4 , EPC8和EPC16 )数据表 [2. Enhanced Configuration Devices (EPC4, EPC8 & EPC16) Data Sheet]
分类和应用: PC
文件页数/大小: 36 页 / 387 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Functional Description  
Furthermore, all enhanced configuration device configuration schemes  
(PS, FPP, and concurrent PS) are supported with the page mode feature.  
The number of pages and/or devices that can be configured using a  
single enhanced configuration device is only limited by the size of the  
flash memory.  
f
For detailed information on the page mode feature implementation and  
programming file generation steps using Quartus II software, refer to  
Using Altera Enhanced Configuration Devices, chapter 3 in volume 2 of the  
Configuration Handbook.  
Real-Time Decompression  
Enhanced configuration devices support on-chip real time  
decompression of configuration data. FPGA configuration data is  
compressed by the Quartus II software and stored in the enhanced  
configuration device. During configuration, the decompression engine  
inside the enhanced configuration device will decompress or expand  
configuration data. This feature increases the effective configuration  
density of the enhanced configuration device up to 7, 15, or 30 Mbits in  
the EPC4, EPC8, and EPC16, respectively.  
The enhanced configuration device also supports a parallel 8-bit data bus  
to the FPGA to reduce configuration time. However, in some cases, the  
FPGA data transfer time is limited by the flash read bandwidth. For  
example, when configuring an APEX II device in FPP (byte-wide data per  
cycle) mode at a configuration speed of 66 MHz, the FPGA write  
bandwidth is equal to 8 bits × 66 MHz = 528 Mbps. The flash read  
interface, however, is limited to approximately 10 MHz (since the flash  
access time is ~90 ns). This translates to a flash read bandwidth of  
16 bits × 10 MHz = 160 Mbps. Hence, the configuration time is limited by  
the flash read time.  
When configuration data is compressed, the amount of data that needs to  
be read out of the flash is reduced by about 50%. If 16 bits of compressed  
data yields 30 bits of uncompressed data, the flash read bandwidth  
increases to 30 bits × 10 MHz = 300 Mbps, reducing overall configuration  
time.  
You can enable the controller's decompression feature in the Quartus II  
software, Configuration Device Options window by turning on  
Compression Mode.  
2–16  
Altera Corporation  
Configuration Handbook, Volume 2  
August 2005  
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