Configuring Cyclone II Devices
Table 13–11. Dedicated Configuration Pins on the Cyclone II Device (Part 2 of 5)
User Configuration
Mode Scheme
Pin Name
Pin Type
Description
N/A
All
Bidirectional
open-drain
nSTATUS
The Cyclone II device drives nSTATUSlow
immediately after power-up and releases it after the
POR time.
This pin provides a status output and input for the
Cyclone II device. If the Cyclone II device detects an
error during configuration, it drives the nSTATUSpin
low to stop configuration. If an external source (for
example, another Cyclone II device) drives the
nSTATUSpin low during configuration or
initialization, the target device enters an error state.
Driving nSTATUSlow after configuration and
initialization does not affect the configured device. If
your design uses a configuration device, driving
nSTATUSlow causes the configuration device to
attempt to configure the FPGA, but since the FPGA
ignores transitions on nSTATUSin user mode, the
FPGA does not reconfigure. To initiate a
reconfiguration, pull the nCONFIGpin low.
The enhanced configuration devices’ and EPC2
devices’ OEand nCSpins are connected to the
Cyclone II device’s nSTATUSand CONF_DONEpins,
respectively, and have optional internal
programmable pull-up resistors. If you use these
internal pull-up resistors on the enhanced
configuration device, do not use external 10-kΩ pull-
up resistors on these pins. When using EPC2
devices, you should only use external 10-kΩ pull-up
resistors.
The input buffer on this pin supports hysteresis using
Schmitt trigger circuitry.
Altera Corporation
February 2007
13–65
Cyclone II Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
