Configuring Cyclone II Devices
Table 13–7 defines the timing parameters for Cyclone II devices for PS
configuration.
Table 13–7. PS Timing Parameters for Cyclone II Devices
Symbol Parameter
Minimum
Maximum Units
tPOR
POR delay (1)
100
ms
tCF2CD
tCF2ST0
tCFG
800
800
ns
ns
nCONFIGlow to CONF_DONElow
nCONFIGlow to nSTATUSlow
nCONFIGlow pulse width
2
µs
µs
µs
µs
µs
ns
tSTATUS
tCF2ST1
tCF2CK
tST2CK
tDSU
10
40 (2)
40 (2)
nSTATUSlow pulse width
nCONFIGhigh to nSTATUShigh
nCONFIGhigh to first rising edge on DCLK
nSTATUShigh to first rising edge on DCLK
Data setup time before rising edge on DCLK
Data hold time after rising edge on DCLK
DCLKhigh time
40
1
7
tDH
0
ns
tCH
4
ns
tCL
4
ns
DCLKlow time
tCLK
10
ns
DCLKperiod
fMAX
100
40
MHz
µs
DCLKfrequency
tCD2UM
tCD2CU
18
CONF_DONEhigh to user mode (3)
CONF_DONEhigh to CLKUSRenabled
4 × maximum DCLK
period
tCD2UMC
CONF_DONEhigh to user mode with CLKUSR tCD2CU + (299 × CLKUSR
option on
period)
Notes to Table 13–7:
(1) The POR delay minimum of 100 ms only applies for non “A” devices.
(2) This value is applicable if users do not delay configuration by extending the nCONFIGor nSTATUSlow pulse
width.
(3) The minimum and maximum numbers apply only if the internal oscillator is chosen as the clock source for starting
the device.
f
Device configuration options and how to create configuration files are
discussed further in the Software Settings section in Volume 2 of the
Configuration Handbook.
PS Configuration Using a Microprocessor
In the PS configuration scheme, a microprocessor can control the transfer
of configuration data from a storage device, such as flash memory, to the
target Cyclone II device.
Altera Corporation
February 2007
13–31
Cyclone II Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
