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EP2C35F672C8N 参数 Datasheet PDF下载

EP2C35F672C8N图片预览
型号: EP2C35F672C8N
PDF下载: 下载PDF文件 查看货源
内容描述: Cyclone II器件手册,卷1 [Cyclone II Device Handbook, Volume 1]
分类和应用: 现场可编程门阵列可编程逻辑LTE时钟
文件页数/大小: 470 页 / 5764 K
品牌: ALTERA [ ALTERA CORPORATION ]
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I/O Structure & Features  
Table 2–16. Programmable Drive Strength (Part 2 of 2)  
Note (1)  
I
OH/IOL Current Strength Setting (mA)  
I/O Standard  
Top & Bottom I/O Pins  
Side I/O Pins  
LVCMOS (1.5 V)  
2
2
4
6
4
6
8
SSTL-2 class I  
SSTL-2 class II  
8
8
12  
16  
20  
24  
6
12  
16  
SSTL-18 class I  
6
8
8
10  
12  
16  
18  
8
10  
SSTL-18 class II  
HSTL-18 class I  
8
10  
12  
16  
18  
20  
8
10  
12  
HSTL-18 class II  
HSTL-15 class I  
8
10  
12  
16  
HSTL-15 class II  
Note to Table 2–16:  
(1) The default current in the Quartus II software is the maximum setting for each  
I/O standard.  
Open-Drain Output  
Cyclone II devices provide an optional open-drain (equivalent to an  
open-collector) output for each I/O pin. This open-drain output enables  
the device to provide system-level control signals (that is, interrupt and  
write-enable signals) that can be asserted by any of several devices.  
2–50  
Cyclone II Device Handbook, Volume 1  
Altera Corporation  
February 2007  
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