DC & Switching Characteristics
Table 6–39. M512 Block Internal Timing Microparameter Descriptions
Symbol
Parameter
tM512RC
Synchronous read cycle time
tM512WC
Synchronous write cycle time
tM512WERESU
tM512WEREH
tM512DATASU
tM512DATAH
Write or read enable setup time before clock
Write or read enable hold time after clock
Data setup time before clock
Data hold time after clock
tM512WADDRSU
tM512WADDRH
tM512RADDRSU
tM512RADDRH
tM512DATACO1
tM512DATACO2
tM512CLKHL
tM512CLR
Write address setup time before clock
Write address hold time after clock
Read address setup time before clock
Read address hold time after clock
Clock-to-output delay when using output registers
Clock-to-output delay without output registers
Minimum clock high or low time
Minimum clear pulse width
Table 6–40. M4K Block Internal Timing Microparameter Descriptions (Part
1 of 2)
Symbol
Parameter
tM4KRC
Synchronous read cycle time
tM4KWC
Synchronous write cycle time
tM4KWERESU
tM4KWEREH
tM4KBESU
Write or read enable setup time before clock
Write or read enable hold time after clock
Byte enable setup time before clock
Byte enable hold time after clock
A port data setup time before clock
A port data hold time after clock
tM4KBEH
tM4KDATAASU
tM4KDATAAH
tM4KADDRASU
tM4KADDRAH
tM4KDATABSU
tM4KDATABH
tM4KADDRBSU
tM4KADDRBH
A port address setup time before clock
A port address hold time after clock
B port data setup time before clock
B port data hold time after clock
B port address setup time before clock
B port address hold time after clock
Altera Corporation
August 2005
6–27
Stratix GX Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
