ACEX 1K Programmable Logic Device Family Data Sheet
Table 21. ACEX 1K Device Capacitance
Note (14)
Symbol
Parameter
Conditions
Min
Max
Unit
CIN
Input capacitance
VIN = 0 V, f = 1.0 MHz
VIN = 0 V, f = 1.0 MHz
10
12
pF
pF
CINCLK Input capacitance on
dedicated clock pin
COUT
Output capacitance
VOUT = 0 V, f = 1.0 MHz
10
pF
Notes to tables:
(1) See the Operating Requirements for Altera Devices Data Sheet.
(2) Minimum DC input voltage is –0.5 V. During transitions, the inputs may undershoot to –2.0 V for input currents
less than 100 mA and periods shorter than 20 ns.
(3) Numbers in parentheses are for industrial- and extended-temperature-range devices.
(4) Maximum V rise time is 100 ms, and V must rise monotonically.
CC
CC
(5) All pins, including dedicated inputs, clock, I/ O, and JTAG pins, may be driven before V
powered.
and V
are
CCINT
CCIO
(6) Typical values are for T = 25° C, V
= 2.5 V, and V
= 2.5 V or 3.3 V.
A
CCINT
CCIO
(7) These values are specified under the ACEX 1K Recommended Operating Conditions shown in Table 19 on page 46.
(8) The ACEX 1K input buffers are compatible with 2.5-V, 3.3-V (LVTTL and LVCMOS), and 5.0-V TTL and CMOS
signals. Additionally, the input buffers are 3.3-V PCI compliant when V
shown in Figure 22.
and V
meet the relationship
CCIO
CCINT
(9) The I
parameter refers to high-level TTL, PCI, or CMOS output current.
OH
(10) The I parameter refers to low-level TTL, PCI, or CMOS output current. This parameter applies to open-drain pins
OL
as well as output pins.
(11) This value is specified for normal device operation. The value may vary during power-up.
(12) This parameter applies to -1 speed grade commercial temperature devices and -2 speed grade industrial and
extended temperature devices.
(13) Pin pull-up resistance values will be lower if the pin is driven higher than V
(14) Capacitance is sample-tested only.
by an external source.
CCIO
48
Altera Corporation