Arria GX Architecture
Table 2–13 shows the number of DSP blocks in each Arria GX device. DSP
block multipliers can optionally feed an adder/subtractor or accumulator
in the block depending on the configuration, which makes routing to
ALMs easier, saves ALM routing resources, and increases performance
because all connections and blocks are in the DSP block.
Table 2–13. DSP Blocks in Arria GX Devices Note (1)
Total 9 × 9
Multipliers
Total 18 × 18 Total 36 × 36
Device
DSP Blocks
Multipliers
Multipliers
EP1AGX20
EP1AGX35
EP1AGX50
EP1AGX60
EP1AGX90
10
14
26
32
44
80
40
56
10
14
26
32
44
112
208
256
352
104
128
176
Note to Table 2–13:
(1) This list only shows functions that can fit into a single DSP block. Multiple DSP
blocks can support larger multiplication functions.
Additionally, DSP block input registers can efficiently implement shift
registers for FIR filter applications. DSP blocks support Q1.15 format
rounding and saturation. Figure 2–51 shows a top-level diagram of the
DSP block configured for 18 × 18-bit multiplier mode.
Altera Corporation
May 2008
2–73
Arria GX Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
