Adaptive Logic Modules
Figure 2–36. ALM in Shared Arithmetic Mode
shared_arith_in
carry_in
4-Input
LUT
To general or
local routing
To general or
local routing
D
Q
datae0
datac
datab
dataa
reg0
4-Input
LUT
4-Input
LUT
To general or
local routing
datad
datae1
To general or
local routing
D
Q
4-Input
LUT
reg1
carry_out
shared_arith_out
Note to Figure 2–36:
(1) Inputs dataf0and dataf1are available for register packing in shared arithmetic mode.
Adder trees are used in many different applications. For example, the
summation of partial products in a logic-based multiplier can be
implemented in a tree structure. Another example is a correlator function
that can use a large adder tree to sum filtered data samples in a given time
frame to recover or to de-spread data which was transmitted utilizing
spread spectrum technology. An example of a three-bit add operation
utilizing the shared arithmetic mode is shown in Figure 2–37. The partial
sum (S[2..0]) and the partial carry (C[2..0]) is obtained using LUTs,
while the result (R[2..0]) is computed using dedicated adders.
2–50
Arria GX Device Handbook, Volume 1
Altera Corporation
May 2008