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EP1AGX50DF780C6 参数 Datasheet PDF下载

EP1AGX50DF780C6图片预览
型号: EP1AGX50DF780C6
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 50160 CLBs, 640MHz, PBGA780, 29 X 29 MM, 1 MM PITCH, FBGA-780]
分类和应用: 现场可编程门阵列可编程逻辑LTE时钟
文件页数/大小: 296 页 / 3505 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Arria GX Architecture  
Figure 2–38. Register Chain within a LAB Note (1)  
From Previous ALM  
Within The LAB  
reg_chain_in  
To general or  
local routing  
To general or  
local routing  
adder0  
D
Q
reg0  
Combinational  
Logic  
To general or  
local routing  
adder1  
D
Q
reg1  
To general or  
local routing  
To general or  
local routing  
To general or  
local routing  
adder0  
D
Q
reg0  
Combinational  
Logic  
To general or  
local routing  
adder1  
D
Q
reg1  
To general or  
local routing  
reg_chain_out  
To Next ALM  
within the LAB  
Note to Figure 2–38:  
(1) The combinational or adder logic can be utilized to implement an unrelated, un-registered function.  
Altera Corporation  
May 2008  
2–53  
Arria GX Device Handbook, Volume 1  
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