DC and Switching Characteristics
Table 4–7 shows the Arria GX transceiver block AC specification.
Table 4–7. Arria GX Transceiver Block AC Specification Notes (1), (2), (3) (Part 1 of 3)
-6 Speed Grade
Commercial & Industrial
Description
Condition
Unit
XAUI Transmit Jitter Generation (4)
0.3
UI
REFCLK= 156.25 MHz
Pattern = CJPAT
Total jitter at 3.125 Gbps
VOD = 1200 mV
No Pre-emphasis
0.17
UI
REFCLK= 156.25 MHz
Pattern = CJPAT
Deterministic jitter at 3.125 Gbps
VOD = 1200 mV
No Pre-emphasis
XAUI Receiver Jitter Tolerance (4)
Total jitter
> 0.65
> 0.37
> 8.5
> 0.1
> 0.1
UI
UI
UI
UI
UI
Deterministic jitter
Peak-to-peak jitter
Peak-to-peak jitter
Peak-to-peak jitter
Jitter frequency = 22.1 KHz
Jitter frequency = 1.875 MHz
Jitter frequency = 20 MHz
PCI Express (PIPE) Transmitter Jitter Generation (5)
Compliance Pattern;
< 0.25
UI p-p
VOD = 800 mV;
Total Transmitter Jitter Generation
Pre-emphasis = 49%
PCI Express (PIPE) Receiver Jitter Tolerance (5)
Compliance Pattern;
DC Gain = 3 db
Gigabit Ethernet (GIGE) Transmitter Jitter Generation (7)
> 0.6
UI p-p
Total Receiver Jitter Tolerance
Total Transmitter Jitter Generation
(TJ)
CRPAT: VOD = 800 mV;
Pre-emphasis = 0%
< 0.279
< 0.14
UI p-p
UI p-p
Deterministic Transmitter Jitter
Generation (DJ)
CRPAT; VOD = 800 mV;
Pre-emphasis = 0%
Gigabit Ethernet (GIGE) Receiver Jitter Tolerance
Total Jitter Tolerance
CJPAT Compliance Pattern;
> 0.66
> 0.4
UI p-p
UI p-p
DC Gain = 0 dB
Deterministic Jitter Tolerance
CJPAT Compliance Pattern;
DC Gain = 0 dB
Altera Corporation
May 2008
4–11
Arria GX Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
