Stratix II and Stratix II GX DDR Memory Support Overview
Table 3–3. Stratix II DQS and DQ Bus Mode Support (Part 2 of 2)
Note (1)
Number of
Number of
×4 Groups
Number of
Number of
Device
Package
×8/×9 Groups ×16/×18 Groups ×32/×36 Groups
EP2S180 1,020-pin FineLine BGA
1,508-pin FineLine BGA
36
36
18
18
8
8
4
4
Note to Table 3–3:
(1) Check the pin table for each DQS/DQ group in the different modes.
Table 3–4. Stratix II non-DQS and DQ Bus Mode Support
Note (1)
Number of
Number of
Number of
Number of
Device
Package
×4 Groups
×8/×9 Groups ×16/×18 Groups ×32/×36 Groups
EP2S15 484-pin FineLine BGA
672-pin FineLine BGA
13
24
13
36
13
36
51
40
51
51
40
51
51
51
51
7
3
4
1
2
1
3
1
3
6
6
6
6
6
6
6
6
6
9
EP2S30 484-pin FineLine BGA
672-pin FineLine BGA
7
3
15
7
7
EP2S60 484-pin FineLine BGA
672-pin FineLine BGA
3
15
26
24
25
25
24
25
25
25
25
7
1,020-pin FineLine BGA
13
12
12
12
12
12
12
12
12
EP2S90 780-pin FineLine BGA
1,020-pin FineLine BGA
1,508-pin FineLine BGA
EP2S130 780-pin FineLine BGA
1,020-pin FineLine BGA
1,508-pin FineLine BGA
EP2S180 1,020-pin FineLine BGA
1,508-pin FineLine BGA
Note to Table 3–4:
(1) Check the pin table for each DQS/DQ group in the different modes.
3–16
Altera Corporation
January 2008
Stratix II Device Handbook, Volume 2