a16450 Universal Asynchronous Receiver/Transmitter Data Sheet
Table 1. a16450 Ports (Part 2 of 2)
Name
Type
Polarity
Description
sin
Input
Input
–
Serial data input. Receives data for the a16450.
wr
High
Write control. When wror nwris asserted and the a16450is selected,
write transactions to internal registers are possible.
nwr
Input
Low
Write control. When wror nwris asserted and the a16450is selected,
write transactions to internal registers are possible.
a[2..0]
Input
Input
–
–
Register address bus. Selects one of the internal registers. See Table 2.
din[7..0]
Data input bus. The microprocessor writes to internal registers via the
din[7..0]bus.
nbaudout
csout
Output
Output
Output
Low
High
High
Baud out. Transmitter clock that is controlled by the programmable baud
rate generator. Operates at 16 times the baud rate clock.
Chip select output. Indicates that the a16450has been selected (i.e., the
cs0, cs1and ncs2inputs are asserted).
ddis
Driver disable. Indicates that the microprocessor is reading data from the
a16450. This output is intended as a disable or direction control between
the a16450and the microprocessor.
ndtr
Output
Low
Data terminal ready. Indicates that the a16450is ready to exchange data.
This output is controlled by writing to bit 0 of the modem control register.
intr
Output
Output
High
Low
Interrupt. Indicates that an enabled interrupt condition has been met.
nout1
User-programmable output 1. This output is controlled by writing to bit 2 of
the modem control register.
nout2
nrts
sout
Output
Output
Output
Low
Low
High
–
User-programmable output 2. This output is controlled by writing to bit 3 of
the modem control register.
Request to send. Indicates that the a16450is ready to exchange data. This
output is controlled by writing to bit 1 of the modem control register.
Serial data out. Serial (transmitter) data out. When mris asserted, the sout
output is asserted.
dout[7..0] Output
Data output bus.
Altera Corporation
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