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5M160ZT100I5 参数 Datasheet PDF下载

5M160ZT100I5图片预览
型号: 5M160ZT100I5
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 14ns, PQFP100, 16 X 16 MM, 0.50 MM PITCH, TQFP-100]
分类和应用: 时钟可编程逻辑
文件页数/大小: 166 页 / 4004 K
品牌: ALTERA [ ALTERA CORPORATION ]
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8–6  
Chapter 8: JTAG Boundary-Scan Testing in MAX V Devices  
IEEE Std. 1149.1 BST Operation Control  
IEEE Std. 1149.1 BST Operation Control  
MAX V devices implement the SAMPLE/PRELOAD, EXTEST, BYPASS, IDCODE, USERCODE,  
CLAMPand HIGHZIEEE Std. 1149.1 BST instructions. The length of the BST instructions  
is 10 bits. These instructions are described in detail later in this chapter.  
f For a summary of the BST instructions and their instruction codes, refer to the JTAG  
and In-System Programmability in MAX V Devices chapter.  
The IEEE Std. 1149.1 TAP controller, a 16-state state machine clocked on the rising  
edge of TCK, uses the TMSpin to control IEEE Std. 1149.1 operation in the device.  
Figure 8–5 shows the TAP controller state machine.  
Figure 8–5. IEEE Std. 1149.1 TAP Controller State Machine  
TEST_LOGIC/  
TMS = 1  
TMS = 0  
RESET  
TMS = 0  
TMS = 1  
RUN_TEST/  
IDLE  
TMS = 1  
TMS = 0  
SELECT_IR_SCAN  
SELECT_DR_SCAN  
TMS = 1  
TMS = 0  
TMS = 1  
TMS = 1  
CAPTURE_DR  
CAPTURE_IR  
TMS = 0  
TMS = 0  
SHIFT_DR  
SHIFT_IR  
TMS = 0  
TMS = 1  
TMS = 0  
TMS = 1  
TMS = 1  
TMS = 1  
EXIT1_DR  
EXIT1_IR  
TMS = 0  
TMS = 0  
PAUSE_DR  
PAUSE_IR  
TMS = 0  
TMS = 0  
TMS = 1  
TMS = 1  
TMS = 0  
TMS = 0  
EXIT2_DR  
EXIT2_IR  
TMS = 1  
TMS = 1  
TMS = 1  
TMS = 1  
UPDATE_DR  
UPDATE_IR  
TMS = 0  
TMS = 0  
MAX V Device Handbook  
December 2010 Altera Corporation  
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