AV-51002
2017.02.10
1-46
PLL Specifications
Symbol
Parameter
Condition
Min
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max
Unit
FOUT ≥ 100 MHz
FOUT < 100 MHz
FOUT ≥ 100 MHz
FOUT < 100 MHz
FOUT ≥ 100 MHz
FOUT < 100 MHz
FOUT ≥ 100 MHz
FOUT < 100 MHz
FOUT ≥ 100 MHz
FOUT < 100 MHz
FOUT ≥ 100 MHz
FOUT < 100 MHz
FOUT ≥ 100 MHz
FOUT < 100 MHz
FOUT ≥ 100 MHz
FOUT < 100 MHz
175
ps (p-p)
Period jitter for dedicated clock output
in integer PLL
(67)
tOUTPJ_DC
17.5
250(68), 175(69)
25(68), 17.5(69)
mUI (p-p)
ps (p-p)
Period jitter for dedicated clock output
in fractional PLL
(67)
(67)
tFOUTPJ_DC
mUI (p-p)
ps (p-p)
175
Cycle-to-cycle jitter for dedicated clock
output in integer PLL
tOUTCCJ_DC
17.5
250(68), 175(69)
25(68), 17.5(69)
mUI (p-p)
ps (p-p)
Cycle-to-cycle jitter for dedicated clock
output in fractional PLL
(67)
tFOUTCCJ_DC
mUI (p-p)
ps (p-p)
600
60
Period jitter for clock output on a
regular I/O in integer PLL
(67)(70)
tOUTPJ_IO
mUI (p-p)
ps (p-p)
600
60
Period jitter for clock output on a
regular I/O in fractional PLL
(67)(68)(70)
tFOUTPJ_IO
mUI (p-p)
ps (p-p)
600
60
Cycle-to-cycle jitter for clock output on
a regular I/O in integer PLL
(67)(70)
tOUTCCJ_IO
mUI (p-p)
ps (p-p)
600
60
Cycle-to-cycle jitter for clock output on
a regular I/O in fractional PLL
(67)(68)(70)
tFOUTCCJ_IO
mUI (p-p)
(67)
Peak-to-peak jitter with a probability level of 10–12 (14 sigma, 99.99999999974404% confidence levelꢁ.)e output jitter specification applies to the
intrinsic jitter of the PLL, when an input jitter of 30 ps is applied. e external memory interface clock output jitter specifications use a different
measurement method and are available in Memory Output Clock Jitter Specification for Arria V Devices table.
is specification only covered fractional PLL for low bandwidth. e fVCO for fractional value range 0.05–0.95 must be ≥ 1000 MHz.
is specification only covered fractional PLL for low bandwidth. e fVCO for fractional value range 0.20–0.80 must be ≥ 1200 MHz.
External memory interface clock output jitter specifications use a different measurement method, which are available in Memory Output Clock Jitter
Specification for Arria V Devices table.
(68)
(69)
(70)
Arria V GX, GT, SX, and ST Device Datasheet
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