AV-51001
2013.05.06
9
Package Plan
Package Plan
Table 7: Package Plan for Arria V GT Devices—Preliminary
F672
F896
F1152
F1517
(40 mm)
(27 mm)
(31 mm)
(35 mm)
Mem-
ber
Code
XCVR
XCVR
XCVR
XCVR
GPIO
GPIO
GPIO
GPIO
6-Gbps
10-
6-Gbps
10-
6-Gbps
10-
6-Gbps
10-
Gbps
Gbps
Gbps
Gbps
C3
C7
D3
D7
336
—
3 (9)
—
4
416
3 (9)
4
8
—
—
—
12
12
12
—
—
—
—
—
—
12
20
—
—
—
384 6 (18)
384 6 (18)
544 6 (24)
544 6 (24)
544 6 (24)
—
—
8
704 6 (24)
704 6 (36)
—
—
—
—
—
The 6-Gbps transceiver counts are for dedicated 6-Gbps channels. You can also configure any pair of 10-Gbps
channels as three 6-Gbps channels—the total number of 6-Gbps channels are shown in brackets. For example,
you can also configure the Arria V GT D7 device in the F1517 package with nine 6-Gbps and eighteen
10-Gbps, twelve 6-Gbps and sixteen 10-Gbps, fifteen 6-Gbps and fourteen 10-Gbps, or up to thirty-six
6-Gbps with no 10-Gbps channels.
Arria V GZ
This section provides the available options, maximum resource counts, and package plan for the Arria V GZ
devices.
Available Options
Figure 3: Sample Ordering Code and Available Options for Arria V GZ Devices—Preliminary
Package Type
Transceiver Count
Maximum channels
F
H
:
:
FineLine BGA (FBGA)
Hybrid FBGA
Embedded Hard IPs
1 hard PCIe controller
E
H
K
:
:
:
12
24
36
Operating Temperature
M
:
C
I
:
:
Commercial (TJ = 0° C to 85° C)
Industrial (TJ = -40° C to 100° C)
Family Signature
5A
GZ
M
E7
K
2
F
40
C
3
N
5A : Arria V
Optional Suffix
Indicates specific device
options or shipment method
Family Variant
Package Code
GZ : 12.5-Gbps transceivers
29 : 780 pins
35 : 1,152 pins
40 : 1,517 pins
N
L
:
:
Lead-free packaging
Low-power device
Member Code
E1 : 220K logic elements
E3 : 360K logic elements
E5 : 400K logic elements
E7 : 450K logic elements
Transceiver
Speed Grade
FPGA Fabric
Speed Grade
2
3
:
:
12.5 Gbps
10.3125 Gbps
3 (fastest)
4
Note: Low-power device option is available only for –3 speed grade at industrial temperature
Arria V Device Overview
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