AV-51001
2013.05.06
6
Maximum Resources
Maximum Resources
Table 4: Maximum Resource Counts for Arria V GX Devices—Preliminary
Member Code
Resource
A1
A3
A5
A7
B1
B3
B5
B7
Logic Elements (LE)
(K)
75
156
190
242
300
362
420
504
ALM
28,302
58,900
71,698
91,680
113,208 136,880 158,491
190,240
760,960
24,140
2,906
Register
113,208 235,600 286,792 366,720 452,832 547,520 633,964
M10K
MLAB
8,000
463
10,510
961
11,800
1,173
600
13,660
1,448
800
15,100
1,852
920
17,260
2,098
1,045
20,540
2,532
1,092
Memory
(Kb)
Variable-precision
DSP Block
240
396
1,156
18 x 18 Multiplier
PLL2
480
10
9
792
10
9
1,200
12
1,600
12
1,840
12
2,090
12
2,184
16
2,312
16
6 Gbps Transceiver
GPIO3
24
24
24
24
36
36
416
68
80
1
416
68
80
1
544
120
136
2
544
120
136
2
704
160
176
2
704
160
176
2
704
160
176
2
704
160
176
2
Transmitter
LVDS
Receiver
PCIe Hard IP Block
Hard Memory
Controller
2
2
4
4
4
4
4
4
Related Information
High-Speed Differential I/O Interfaces and DPA in Arria V Devices chapter, Arria V Device Handbook
Provides the number of LVDS channels in each device package.
2
3
The number of PLLs includes general-purpose fractional PLLs and transceiver fractional PLLs.
The number of GPIOs does not include transceiver I/Os. In the Quartus II software, the number of user I/Os
includes transceiver I/Os.
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