AV-51001
2013.05.06
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I/O Vertical Migration for Arria V Devices
I/O Vertical Migration for Arria V Devices
Figure 6: Vertical Migration Capability Across Arria V Device Packages and Densities—Preliminary
The arrows indicate the vertical migration paths. Some packages have several migration paths. The devices
included in each vertical migration path are shaded. You can also migrate your design across device densities
in the same package option if the devices have the same dedicated pins, configuration pins, and power pins.
Package
F896
Member
Code
Variant
F672
F780
F1152
F1517
A1
A3
A5
A7
B1
B3
B5
B7
C3
C7
D3
D7
E1
E3
E5
E7
B3
B5
D3
D5
Arria V GX
Arria V GT
Arria V GZ
Arria V SX
Arria V ST
You can achieve the vertical migration shaded in red if you use only up to 320 GPIOs, up to nine 6 Gbps
transceiver channels, and up to four 10 Gbps transceiver (for Arria V GT devices). This migration path is
not shown in the Quartus II software Pin Migration View.
Note: To verify the pin migration compatibility, use the Pin Migration View window in the Quartus® II
software Pin Planner.
Note: Except for Arria V GX A5 and A7, and Arria V GT C7 devices, all other Arria V GX and GT devices
require a specific power-up sequence. If you plan to migrate your design from Arria V GX A5 and
A7, and Arria V GT C7 devices to other Arria V devices, your design must adhere to the same required
power-up sequence.
Related Information
I/O Management chapter, Quartus II Handbook
More information about vertical I/O migrations.
Power Management in Arria V Devices
Describes the power-up sequence required for Arria V GX and GT devices.
Arria V Device Overview
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