AS4LC4M16S0
AS4LC16M4S0
®
Interleaved bank read waveform
(BL = 8, CL = 3, Autoprecharge)
CLK
t
RC
CS
t
RC
RAS
t
t
t
RAS
RAS
RP
tRAS
t
RP
CAS
WE
†
BA0/ BA1
Bank
RA
Bank
Bank
Bank
Bank
Bank
t
t
t
RCD
RCD
RCD
A10
RB
RA
c
a
b
A0–A9, A11
DQM
RA
RA
CA
RB
CA
b
CA
c
c
a
a
b
CKE
DQ
QA
a0
QA QA
QA QA
a3 a4
QA QA QA QB
QB
b1
QB
b4
QB
b5
QB
b6
QA
c0
QA
c0
a1
a2
a5
a6
a7
b0
t
t
RRD
RRD
Active
AP
Read
Bank A
Bank B
Active
AP
Read
Read
Active
†
BA0 and BA1 together determine which bank undergoes operations. AP = internal precharge begins.
Interleaved bank write waveform
(BL = 8)
CLK
CS
t
RC
RAS
t
t
RP
RAS
t
RAS
CAS
t
t
t
RCD
RCD
RCD
WE
†
Bank
RA
Bank
Bank
Bank
Bank
RA
Bank
BA0/ BA1
A10
RB
b
a
c
RA
RA
CA
RB
b
CA
CA
c
c
a
a
b
A0-A9,A11
DQM
CKE
DB
b2
DA
a0
DA
a1
DA
a4
DA
a5
DA DA
a6 a7
DB
DB
b1
DB
b3
DB
b4
DB
b5
DB
b6
DB
b7
DA
c0
DA
c1
DA
c2
b0
DQ
Write
Precharge
Active
Write
Bank A Active
Bank B
Active
Write
Precharge
†
BA0 and BA1 together determine which bank undergoes operations.
22
ALLIANCE SEMICONDUCTOR
7/ 5/ 00