AS4LC4M16S0
AS4LC16M4S0
®
Burst read/ single write waveform
(BL = 4, CL = 3)
CLK
CS
RAS
CAS
WE
BA0/ BA1
A10
RA
a
A0–A9,A11
DQM
CA
CA
d
CA
b
RA
CA
a
r
a
CKE
DQ
A
A
A
A
A
A
A
A
A
A
d3
a0
a1
a2
a3
a4
a5
d0
d1
d2
Single
Write
Q
Q
Q
Q
Activate
Q
Q
Q
Q
Read
Read
D
D
Interleaved bank read waveform
(BL = 4, CL = 3)
CLK
t
t
t
CCD
CCD
CCD
CS
RAS
CAS
WE
t
t
RP
RAS
†
BA0/ BA1
Bank
Bank Bank
Bank
Bank
Bank
Bank
Bank
Bank
t
t
RCD
RCD
A10
A0–A9, A11
DQM
RA
a
RB
a
CA
b
CB
b
RA
a
CA RB
CB
a
CA
c
a
a
CKE
DQ
QB QA QA
a1 b0 b1
QA QA QA QB QB QB QB
b0 b1 b2 b3
QA QA QA QA
a0 a1 a2 a3
QA
b2
QB
a0
c0
c1
c2
Read
Precharge
Bank A
Bank B
Read
Active
Read
Read
Precharge
†
BA0 and BA1 together determine which bank undergoes operations.
20
ALLIANCE SEMICONDUCTOR
7/ 5/ 00