AS4LC4M16S0
AS4LC16M4S0
®
(D) WR-P Interrupted by WR in another bank (CL = 3, BL = 4)
CLK
WRP
(A)
WR
(B)
CMD
D
D
D
D
D
B3
D
DB
DQ
A0
A1
A2
B0
B2
1
Bank A Precharge Starts *
The row active command of the precharged bank can be issued after t from this point.
*
RP
Clock suspension read waveforms
(BL = 8)
CLK external
CLK internal
CKE
DQM
Q
Q
2
DQ
Q
Q
Q
6
1
3
4
OPEN
OPEN
CLK external
CLK internal
CKE
DQM
DQ
Q
1
Q
Q
Q
4
Q
2
3
6
OPEN
CLK external
CLK internal
CKE
DQM
DQ
Q
Q
Q
Q
Q
Q
1
2
3
4
6
5
14
ALLIANCE SEMICONDUCTOR
7/ 5/ 00