AS4C64M8D2
Figure 30. Burst read operation followed by precharge:
(RL=4, AL=1, CL=3, BL=4, tRTP ≦2 clocks)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK#
CK
Bank A
Active
Post CAS#
Read A
Precharge
NOP
AL+BL'/2 clks
NOP
NOP
NOP
NOP
NOP
CMD
DQS
DQS#
AL=1
CL=3
>=tRP
RL=4
DQ
DOUTA0 DOUTA1 DOUTA2 DOUTA3
>=tRAS
>=tRTP
CL=3
Figure 31. Burst read operation followed by precharge:
(RL=4, AL=1, CL=3, BL=8, tRTP≦2 clocks)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK#
CK
Post CAS#
READ A
Precharge A
NOP
AL + BL/2 clks
NOP
NOP
NOP
NOP
NOP
NOP
CMD
DQS
DQS#
AL = 1
CL = 3
RL= 4
DQ's
DOUT DOUT DOUT DOUT DOUT DOUT DOUT DOUT
A0
A1
A2
A3
A4
A5
A6
A7
>=tRTP
First 4-bit prefetch
Second 4-bit prefetch
Confidential
45
Rev. 1.0
Feb. /2014