AS4C128M16D3A-12BIN
WL + 4
+
Timing of WR command to Power Down
entry (BL8OTF, BL8MRS, BC4OTF)
-
tWRPDEN
tWRAPDEN
tWRPDEN
tWRAPDEN
tCK
(tWR
tCK
/
)
WL + 4
+
WR + 1
WL + 2
+
Timing of WRA command to Power
Down entry (BL8OTF, BL8MRS,BC4OTF)
-
-
-
tCK
Timing of WR command to Power Down entry
(BC4MRS)
tCK
(tWR
tCK
/
)
WL + 2
+
WR + 1
Timing of WRA command to Power Down entry
(BC4MRS)
tCK
tCK
-
-
1
Timing of REF command to Power Down entry
Timing of MRS command to Power Down entry
tREFPDEN
tMRSPDEN
tMOD
(min)
WL - 2 = CWL + AL - 2
WL - 2 = CWL + AL - 2
ODT turn on Latency
ODT turn off Latency
ODTLon
ODTLoff
tCK
ODT high time without write command or
with write command and BC4
-
-
4
6
2
tCK
tCK
ns
ODTH4
ODT high time with Write command and BL8
ODTH8
Asynchronous RTT turn-on delay
(Power- Down with DLL frozen)
Asynchronous RTT turn-off delay
(Power-Down with DLL frozen)
8.5
tAONPD
8.5
225
0.7
0.7
-
2
tAOFPD
tAON
ns
ps
tCK
tCK
tCK
-225
0.3
0.3
40
RTT turn-on
RTT_Nom and RTT_WR turn-off time
from ODTLoff reference
tAOF
RTT dynamic change skew
tADC
First DQS/DQS# rising edge after write
leveling mode is programmed
tWLMRD
DQS/DQS# delay after write leveling
mode is programmed
Write leveling setup time from rising CK,
CK# crossing to rising DQS, DQS# crossing
Write leveling hold time from rising DQS,
DQS# crossing to rising CK, CK# crossing
-
-
-
25
tWLDQSEN
tWLS
tCK
ps
ps
165
165
tWLH
7.5
2
0
0
Write leveling output delay
tWLO
tWLOE
tRFC
ns
ns
ns
µs
µs
Write leveling output error
160
-
-
REF command to ACT or REF command time
7.8
3.9
-40°C to 85°C
Average periodic refresh interval
tREFI
-
85°C to 95°C
Confidential
-28／83-
Rev. 1.0 May 2016
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
