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AS4C128M16D3A-12BIN 参数 Datasheet PDF下载

AS4C128M16D3A-12BIN图片预览
型号: AS4C128M16D3A-12BIN
PDF下载: 下载PDF文件 查看货源
内容描述: [AS4C128M16D3A-12BIN - 96 ball FBGA PACKAGE]
分类和应用:
文件页数/大小: 83 页 / 2180 K
品牌: ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
 浏览型号AS4C128M16D3A-12BIN的Datasheet PDF文件第23页浏览型号AS4C128M16D3A-12BIN的Datasheet PDF文件第24页浏览型号AS4C128M16D3A-12BIN的Datasheet PDF文件第25页浏览型号AS4C128M16D3A-12BIN的Datasheet PDF文件第26页浏览型号AS4C128M16D3A-12BIN的Datasheet PDF文件第28页浏览型号AS4C128M16D3A-12BIN的Datasheet PDF文件第29页浏览型号AS4C128M16D3A-12BIN的Datasheet PDF文件第30页浏览型号AS4C128M16D3A-12BIN的Datasheet PDF文件第31页  
AS4C128M16D3A-12BIN  
max  
Internal READ Command to  
PRECHARGE Command delay  
(4nCK,  
7.5ns)  
max  
(4nCK,  
7.5ns)  
-
tRTP  
Delay from start of internal write  
transaction to internal read command  
-
tWTR  
15  
4
-
-
WRITE recovery time  
tWR  
ns  
Mode Register Set command cycle time  
tMRD  
tCK  
Max  
(12nCK,  
15ns)  
-
-
Mode Register Set command update delay  
tMOD  
4
CAS# to CAS# command delay  
tCCD  
tCK  
tCK  
tCK  
WR + tRP  
Auto precharge write recovery + prechargetime  
Multi-Purpose Register Recovery Time  
tDAL(min)  
tMPRR  
1
-
-
max  
(4nCK,  
7.5ns)  
ACTIVE to ACTIVE command period  
Four activate window  
tRRD  
tFAW  
40  
45  
170  
-
-
-
-
-
ns  
ps  
ps  
ps  
AC175  
Command and Address setup time to CK,  
CK# referenced to Vih(ac) / Vil(ac) levels  
tIS(base)  
AC150  
AC135  
Command and Address hold time from CK,  
CK# referenced to Vih(dc) / Vil(dc) levels  
Control and Address Input pulse width for  
each input  
120  
560  
-
-
DC100  
tIH(base)  
tIPW  
ps  
ps  
512  
256  
64  
-
-
-
Power-up and RESET calibration time  
Normal operation Full calibration time  
Normal operation Short calibration time  
tZQinit  
tZQoper  
tZQCS  
tCK  
tCK  
tCK  
Max  
(5nCK,  
-
-
Exit Reset from CKE HIGH to a valid command  
tXPR  
tRFC  
+
10ns)  
Max  
(5nCK,  
Exit Self Refresh to commands not  
requiring a locked DLL  
tXS  
tXSDLL  
tCKESR  
tCKSRE  
tCKSRX  
tRFC  
+
10ns)  
tDLLK  
(min)  
Exit Self Refresh to commands requiring a  
locked DLL  
-
-
tCK  
tCKE  
(min) +  
1 nCK  
Max  
(5 nCK,  
10ns)  
Max  
Minimum CKE low width for Self Refresh  
entry to exit timing  
Valid Clock Requirement after Self Refresh Entry (SRE)  
or Power-Down Entry (PDE)  
-
-
Valid Clock Requirement before Self Refresh Exit (SRX)  
or Power-Down Exit (PDX) or Reset Exit  
(5 nCK,  
10ns)  
Exit Power Down with DLL on to any valid command;  
Exit Precharge Power Down with DLL frozen to  
commands not requiring a locked DLL  
Max  
(3 nCK,  
6ns)  
-
-
tXP  
Max  
(10nCK,  
24 ns)  
Max  
(3 nCK,  
5ns)  
Exit Precharge Power Down with DLL  
frozen to commands requiring a lockedDLL  
tXPDLL  
tCKE  
-
-
CKE minimum pulse width  
1
Command pass disable delay  
tCPDED  
tPD  
tACTPDEN  
tPRPDEN  
tCK  
tCKE  
(min)  
9 *  
tREFI  
Power Down Entry to Exit Timing  
1
-
Timing of ACT command to Power Down entry  
tCK  
tCK  
Timing of PRE or PREA command to  
Power Down entry  
1
-
RL + 4 +  
1
-
Timing of RD/RDA command to Power Down entry  
tRDPDEN  
tCK  
Confidential  
-2783-  
Rev. 1.0 May 2016  
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