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AK8817VQ 参数 Datasheet PDF下载

AK8817VQ图片预览
型号: AK8817VQ
PDF下载: 下载PDF文件 查看货源
内容描述: NTSC / PAL数字视频编码器 [NTSC/PAL Digital Video Encoder]
分类和应用: 转换器色度信号转换器消费电路商用集成电路编码器
文件页数/大小: 50 页 / 427 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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ASAHI KASEI  
Pin#  
[AK8817/18]  
Pin Name  
I/O  
Functional Outline  
31  
32  
PVSS  
VDI  
G
I
Ground pin for PVDD.  
Vertical SYNC signal input pin.  
Hi-Z input is acceptable to this pin at PDN = L.  
Horizontal SYNC signal input pin.  
Hi-Z input is acceptable to this pin at PDN = L.  
I2C data pin.  
33  
HDI  
I
This pin is pulled-up to PVDD.  
34  
SDA  
I/O  
Hi-Z input is possible when PDN is at low.  
SDA input is not accepted during the reset sequence operation.  
I2C clock input pin  
An input level of lower-than-PVDD should be input.  
Hi-Z input is possible when PDN is at low.  
SCL input is not accepted during the reset sequence operation.  
35  
SCL  
I
36  
37  
N.C.  
-
I
For normal operation, left open.  
ATPG  
For normal operation, connect to ground.  
Power Down Pin. After returning from PD mode to normal operation, RESET  
Sequence should be done to AK8817/18VQ.  
“L “(GND level): Power-down  
38  
39  
PDN  
I
I
“H “: normal operation  
Reset input pin. In order to initialize the device , an initialization must be made in  
accordance with the reset sequence.  
“L “ : reset  
RSTN  
“H “ : normal operation  
Hi-Z input is acceptable to this pin at PDN = L.  
40  
41  
42  
43  
DVSS  
DVDD  
N.C.  
G
P
-
Digital ground pin (digital core ground).  
Digital power supply pin (digital core power supply).  
For normal operation, left open.  
VOUT  
O
Video output pin.  
Substrate ground pin.  
Connect this pin to Analog ground  
44  
BVSS  
G
45  
46  
47  
48  
SAG  
AVSS  
O
G
O
-
SAG Compensation Input pin  
Analog ground pin.  
DAC output pin. Connect this pin to Analog ground via a 390 ohm resistor  
( better than +/- 1% accuracy ).  
DACOUT  
N.C.  
For normal operation, left open.  
Analog Output pin status  
MODE / PIN name  
IREF  
Hi-Z  
VREF  
Hi-Z  
DACOUT  
VOUT  
Hi-Z  
Hi-Z  
DAC Power Down  
Hi-Z  
Hi-Z  
PDNL  
PDN=HDAC=L  
VIDEOAMP=L  
PDN=HDAC=H  
VIDEOAMP=L  
PDN=HDAC=H  
VIDEOAMP=H  
Output  
Outpu  
VIDEOAMP Power Down  
Output  
Output  
Output  
Output  
Output  
Output  
VIDEOAMP Power Down(1)  
Output  
DAC: Sub Address 0x00 bit7 0: L->DACOFF 1: H->DACON  
VIDEOAMP: Sub Address 0x01 bit3,4 00: L->VIDEOAMP_OFF 01,10: H-> VIDEOAMP_ON  
Note1) Video Amp becomes power down. Since DACOUT pin and VOUT pin are connected with RESISTOR in the LSI,  
DACOUT pin are not Hi-Z. In case of using only DAC, VOUT pin and SAG pin should be open states.  
Rev.001E  
8
2009 / 12