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AK7740ET 参数 Datasheet PDF下载

AK7740ET图片预览
型号: AK7740ET
PDF下载: 下载PDF文件 查看货源
内容描述: 双声道的24bit ADC + 24位4通道DAC的音频DSP [24bit 2ch ADC + 24bit 4ch DAC with Audio DSP]
分类和应用:
文件页数/大小: 48 页 / 281 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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[ASAHI KASEI]  
[AK7740ET]  
7-2-b) Program RAM read (during reset phase)  
To read data written into PRAM, input the command code and the address to be read out. After that, set SI to "H" and  
SCLK to "L". The data is clocked out from SO synchronized with the falling edge of SCLK (ignore the RDY  
operation that will occur in this case). If there are continuous addresses to be read, repeat the above procedure starting  
from the step where SI is set to "H".  
Data transfer procedure  
cCommand code input C1h ( 1 1 0 0 0 0 0 1 )  
dRead address input MSB ( 0 0 0 0 0 0 0 A8)  
eRead address input LSB  
(A7 .  
.
.
.
A0)  
S_RESET  
RQ  
SCLK  
SI  
11000001 0000000 A8 A7 **** A1 A0  
SO  
RDY  
D31 **** D0 D31 **** D0  
Reading of PRAM data  
<Pre-E-01>  
- 36 -  
2006/10  
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