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AK7740ET 参数 Datasheet PDF下载

AK7740ET图片预览
型号: AK7740ET
PDF下载: 下载PDF文件 查看货源
内容描述: 双声道的24bit ADC + 24位4通道DAC的音频DSP [24bit 2ch ADC + 24bit 4ch DAC with Audio DSP]
分类和应用:
文件页数/大小: 48 页 / 281 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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[ASAHI KASEI]  
[AK7740ET]  
7-1-d) Offset RAM write (during reset phase)  
The data comprising a set of five bytes is used to perform offset RAM write operations (during reset phase). When all  
data has been transferred, the RDY terminal goes to "H". Upon completion of writing into the OFRAM, RDY goes to  
"H" to allow the next data to be input. When data of continuous addresses are written, input the data as they are. To  
write discontinuous data, shift the RQ terminal from "H" to "L". Then input the command code, address and data in  
that order.  
Data transfer procedure  
c Command code 90h ( 1 0  
0
1 0 0 0 0 )  
A5 A4 .. . . A0 )  
0 0 0 0 )  
d Address  
e Data  
( 0  
(0  
0
0
0
0
f Data  
(0 0 0 D12 D11 * * . D8 )  
g Data  
(D7  
.
.
.
.
.
.
D0 )  
S_RESET  
RQ  
SCLK  
SI  
10010000  
00A5****A0  
00000000  
D7****D1D0  
000D12***D8  
RDY  
SO  
Input of data into OFRAM  
<Pre-E-01>  
- 33 -  
2006/10  
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