[ASAHI KASEI]
[AK7740ET]
6-2) I2S compatible input format (DIF=1)
LRCLK
Left ch
Right ch
BITCLK
9
2
8
7
L
6
5
4
3 2 1 0
31 30 29 28
M 22 21
31 30 29 28
M 22 21
9
2
8
1
7
L
6
5
4
3
2
1 0
SDIN,SDINA
1
M : MSB, L : LSB
Mode 1: (DIF1(D4), DIF0(D3)) = (0, 0) must be set.
6-3) Standard output format (DIF=0: default set value)
LRCLK
Left ch
Right ch
BITCLK
10 9
8
L
7
6
5
4
3
2
1
0
10
2
9
1
8
L
7
6
5
4
3
2
1
0
31 30 29
M 22 21
31 30 29
M 22 21
SDOUT
2
1
SDOUTA
M : MSB, L : LSB
6-4) I2S compatible output format (DIF=1)
LRCLK
BITCLK
Left ch
Right ch
31 30 29 28
M 22 21
9
8
1
7
L
6
5
4
3 2 1 0
31 30 29 28
M 22 21
9
8
1
7
L
6
5
4
3 2 1 0
SDOUT
2
2
SDOUTA
M : MSB, L : LSB
<Pre-E-01>
- 28 -
2006/10
AKM [ ASAHI KASEI MICROSYSTEMS ]
