[AK4671]
4. EXT Slave Mode
Example:
Audio I/F Format: MSB justified (ADC and DAC)
Input MCKI frequency: 256fs
Sampling Frequency: 44.1kHz
MCKO: Disable
Power Supply
(1) Power Supply & PDN pin = “L” Æ “H”
(1)
PDN pin
(2) Addr:03H, Data:02H
Addr:01H, Data:00H
(2)
(3)
PMVCM bit
(Addr:00H, D0)
(4)
(4)
MCKI pin
Input
Input
(3) Addr:00H, Data:01H
LRCK pin
BICK pin
MCKI, BICK and LRCK input
Figure 112. Clock Set Up Sequence (4)
<Example>
(1) After Power Up, PDN pin = “L” Æ “H”. “L” time of 150ns or more is needed to reset the AK4671.
The AK4671 should be operated as the recommended power-up/down sequence shown in “System Design
(Grounding and Power Supply Decoupling)” to avoid pop noise at the receiver output, headphone output and
lineout output.
(2) DIF1-0 and FS1-0 bits should be set during this period.
(3) Power Up VCOM: PMVCM bit = “0” Æ “1”
VCOM should first be powered up before the other block operates.
(4) Normal operation starts after the MCKI, LRCK and BICK are supplied.
MS0666-E-02
2010/06
- 150 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
