[AK4679]
■ Output Selector of Port#1, Port#2 and Port#3
The AK4679 has output selectors. After releasing hardware suspend, LPDO1/2 bits control signal path of SDOUT1/2
respectively. On both hardware reset and suspend states, Port#1 input/output are bypassed to Port#2 output/input
respectively. The output pin selection of the Por#3 is done by LPDO3 and 4 bits. Each output pin has an output enable
switch. (OUTxN bit x = 1, 2, 3, 4)
FS[3:0] bits
PCM I/F Port #2
Up-down
DIN2
SDIN2
Sample
converter
LPDO2 bit
1
0
(8k←→16k DOUT2
SDOUT2
SYNC2
SYNC1
SYNC3
0
1
AKM
PT2N bit
SELPT bit
BCLK1
BCLK3
0
1
DSP
Core
BCLK2
PCM I/F Port #1
SYNC1
BCLK1
DIN1
SDIN1
LPDO1 bit
0
1
SDOUT1
DOUT1
PCM I/F Port #3
DIN3
DOUT3
DIN4
SDIN3
LPDO3 bit
1
0
SDOUT3
SDIN4
LPDO4 bit
0
1
SDOUT4
DOUT4
SYNC3
BCLK3
Figure 109. Output Selector of Port#1, Port#2 and Port#3 (Red: hardware reset)
MS1402-E-06
2013/02
- 135 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
