[AK4646]
SWITCHING CHARACTERISTICS
(Ta = 25°C; AVDD =2.2 ∼ 3.6V, DVDD =1.6 ∼ 3.6V, SVDD =2.2 ∼ 4.0V; CL=20pF)
Parameter
Symbol
min
typ
max
Units
PLL Master Mode (PLL Reference Clock = MCKI pin)
MCKI Input Timing
Frequency
fCLK
tCLKL
tCLKH
12
0.4/fCLK
0.4/fCLK
-
-
-
27
-
-
MHz
ns
ns
Pulse Width Low
Pulse Width High
MCKO Output Timing
Frequency
fMCK
0.2352
-
12.288
MHz
Duty Cycle
Except 256fs at fs=32kHz, 29.4kHz
256fs at fs=32kHz, 29.4kHz
LRCK Output Timing
dMCK
dMCK
40
-
50
33
60
-
%
%
Frequency
Duty Cycle
fs
Duty
7.35
-
-
50
48
-
kHz
%
BICK Output Timing
Period
tBCK
tBCK
dBCK
-
-
-
1/(32fs)
1/(64fs)
50
-
-
-
ns
ns
%
BCKO bit = “0”
BCKO bit = “1”
Duty Cycle
PLL Slave Mode (PLL Reference Clock = MCKI pin)
MCKI Input Timing
Frequency
fCLK
tCLKL
tCLKH
12
0.4/fCLK
0.4/fCLK
-
-
-
27
-
-
MHz
ns
ns
Pulse Width Low
Pulse Width High
MCKO Output Timing
Frequency
fMCK
0.2352
-
12.288
MHz
Duty Cycle
Except 256fs at fs=32kHz, 29.4kHz
256fs at fs=32kHz, 29.4kHz
LRCK Input Timing
dMCK
dMCK
40
-
50
33
60
-
%
%
Frequency
Duty
fs
Duty
7.35
45
-
-
48
55
kHz
%
BICK Input Timing
Period
tBCK
tBCKL
tBCKH
1/(64fs)
0.4 x tBCK
0.4 x tBCK
-
-
-
1/(32fs)
ns
ns
ns
Pulse Width Low
Pulse Width High
-
-
MS0557-E-05
2011/01
- 12 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
