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AK4646_11 参数 Datasheet PDF下载

AK4646_11图片预览
型号: AK4646_11
PDF下载: 下载PDF文件 查看货源
内容描述: 立体声编解码器与MIC / SPK- AMP [Stereo CODEC with MIC/SPK-AMP]
分类和应用: 解码器编解码器
文件页数/大小: 81 页 / 725 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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[AK4646]  
Units  
min  
typ  
max  
Parameter  
Speaker-Amp Characteristics: DAC SPP/SPN pins, ALC=OFF,OVOL=0dB, CL=3μF, Rserial=10Ω x 2, BTL,  
SVDD=3.8V  
Output  
Voltage  
(Note 18)  
S/(N+D)  
(Note 19)  
SPKG1-0 bits = “11”, -0.5dBFS  
-
-
6.33  
60  
-
-
Vpp  
dB  
SPKG1-0 bits = “11”, -0.5dBFS  
(A-weighted)  
S/N  
-
50  
-
90  
-
-
-
-
3
dB  
Ω
μF  
Load Impedance (Note 20)  
Load Capacitance (Note 20)  
Mono Input: MIN pin (External Input Resistance=20kΩ)  
Maximum Input Voltage (Note 21)  
Gain (Note 22)  
-
1.98  
-
Vpp  
MIN Æ LOUT/ROUT LOVL1-0 bit = “00”  
LOVL1-0 bit = “01”  
-4.5  
0
+4.5  
dB  
dB  
dB  
dB  
-
-
-
+2  
+4  
+6  
-
-
-
LOVL1-0 bit = “10”  
LOVL1-0 bit = “11”  
MIN Æ SPP/SPN  
ALC bit = “0”, SPKG1-0 bits = “00”  
ALC bit = “0”, SPKG1-0 bits = “01”  
ALC bit = “0”, SPKG1-0 bits = “10”  
ALC bit = “0”, SPKG1-0 bits = “11”  
ALC bit = “1”, SPKG1-0 bits = “00”  
ALC bit = “1”, SPKG1-0 bits = “01”  
ALC bit = “1”, SPKG1-0 bits = “10”  
ALC bit = “1”, SPKG1-0 bits = “11”  
Power Supplies:  
+0.1  
+4.6  
+6.6  
+8.6  
+10.6  
+6.6  
+8.6  
+9.1  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+10.6  
+12.6  
Power Up (PDN pin = H)  
All Circuit Power-up (Note 23)  
AVDD+DVDD  
-
-
15  
4
23  
12  
mA  
mA  
SVDD (No Output)  
Power Down (PDN pin = “L”) (Note 24)  
AVDD+DVDD+SVDD  
-
1
100  
μA  
Note 19. In case of measuring at SPP and SPN pins.  
Note 20. Load impedance is total impedance of series resistance and piezo speaker impedance at 1kHz in Figure 34. Load  
capacitance is capacitance of piezo speaker. When piezo speaker is used, 10Ω or more series resistors should be  
connected at both SPP and SPN pins, respectively.  
Note 21. Maximum voltage is in proportion to both AVDD and external input resistance (Rin).  
Vin = 0.636 x AVDD x Rin / 20kΩ (typ).  
Note 22. The gain is in inverse proportion to external input resistance  
Note 23. PLL Master Mode (MCKI=12MHz); PMADL = PMADR = PMDAC = PMLO = PMSPK = PMVCM = PMPLL  
= MCKO = PMBP = PMMP = M/S bits = “1”. MPWR pin outputs 0mA.  
AVDD= 10mA(typ), DVDD=5mA(typ).  
EXT Slave Mode (PMPLL = M/S = MCKO bits = 0): AVDD=10mA(typ), DVDD=4mA(typ).  
Note 24. All digital input pins are fixed to DVDD or DVSS.  
MS0557-E-05  
2011/01  
- 10 -