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AK4634EC 参数 Datasheet PDF下载

AK4634EC图片预览
型号: AK4634EC
PDF下载: 下载PDF文件 查看货源
内容描述: [Consumer Circuit, PBGA29, 2.50 X 3 MM, 0.50 MM PITCH, CSP-29]
分类和应用: 商用集成电路
文件页数/大小: 87 页 / 1043 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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[AK4634]  
EXT Slave Mode (PMPLL bit = “0”, M/S bit = “0”)  
When PMPLL bit is “0”, the AK4634 becomes EXT Slave mode. Master clock is input from the MCKI pin, the internal  
PLL circuit is not operated. This mode is compatible with I/F of the normal audio CODEC. The clocks required to operate  
are MCKI (256fs, 512fs or 1024fs), FCK (fs) and BICK (32fs). The master clock (MCKI) should be synchronized with  
FCK. The phase between these clocks is not important. The input frequency of MCKI is selected by FS1-0 bits. (Table 11)  
Mode  
FS3-2 bits  
FS1 bit  
FS0 bit  
MCKI Input  
Frequency  
256fs  
Sampling Frequency  
Range  
x
x
x
x
0
1
0
1
(default)  
0
1
2
3
0
0
1
1
7.35kHz fs 48kHz  
7.35kHz fs 13kHz  
7.35kHz fs 26kHz  
7.35kHz fs 48kHz  
1024fs  
512fs  
256fs  
Table 11. MCKI Frequency at EXT Slave Mode (PMPLL bit = “0”, M/S bit = “0”) (x: Don’t care)  
External Slave Mode does not support Mode 0 (DSP Mode) of Audio Interface Format.  
The S/N of the DAC at low sampling frequencies is worse than at high sampling frequencies due to out-of-band noise.  
The out-of-band noise can be improved by using higher frequency of the master clock. (Table 12, Table 13)  
S/N (fs=8kHz, 20kHzLPF + A-weighted)  
MCKI  
DAC AOUT  
256fs  
512fs  
1024fs  
84dB  
92dB  
92dB  
Table 12. Relationship between MCKI and S/N of AOUT and SPK-Amp  
Output Noise Level  
(SVDD=3.3V,fs=8kHz, 20kHzLPF + A-weighted)  
MCKI  
SDTI SPK-Amp  
-58dBV  
256fs  
512fs  
-72dBV  
1024fs  
-80dBV  
Table 13. Relationship between MCKI and Output Noise Level of SPK-Amp  
The external clocks (MCKI, BICK and FCK) should always be present whenever the ADC or DAC or SPK or  
Programmable Filter is in operation (PMADC = PMDAC = PMSPK bit = PMPFIL bits = “1”). If these clocks are not  
provided, the AK4634 may draw excess current and it is not possible to operate properly because utilizes dynamic  
refreshed logic internally. If the external clocks are not present, the ADC, DAC, SPK and Programmable Filter should be  
in the power-down mode (PMADC = PMDAC = PMSPK bit = PMPFIL bits = “0”).  
AK4634  
MCKO  
DSP or μP  
256fs, 512fs or 1024fs  
MCKI  
BICK  
FCK  
MCLK  
BCLK  
FCK  
32fs  
1fs  
SDTI  
SDTO  
SDTI  
SDTO  
Figure 23. EXT Slave Mode  
MS0983-E-00  
2008/07  
- 29 -  
 
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