ASAHI KASEI
[AK4527B]
n
Overflow Detection
The AK4527B has overflow detect function for analog input. Overflow detection is enabled when OVFE bit is set to “1”
at serial control mode. OVF pin goes to “H” if analog input of Lch or Rch overflows. OVF output for overflowed analog
input has the same group delay as ADC (GD=27.6/fs=626µs@fs=44.1kHz).
OVF is “L” for 522/fs(=11.8ms@fs=44.1kHz) after PDN = “↑”, and then overflow detection is enabled.
n Zero detection
The AK4527B has two pins for zero detect flag outputs. Channel grouping can be selected by DZFM2-0 bits if P/S = “L”
and DZFE = “L” (table 8). DZF1 pin corresponds to the group 1 channels and DZF2 pin corresponds to the group 2
channels. However DZF2 pin becomes OVF pin if OVFE bit is set to “1”. Zero detection mode is set to mode 0 if DZFE=
“H” regardless of P/S pin. DZF1 is AND of all six channels and DZF2 is disabled (“L”) at mode 0. Table 9 shows the
relation of P/S, DZFE, OVFE and DZF.
When the input data of all channels in the group 1(group 2) are continuously zeros for 8192 LRCK cycles, DZF1(DZF2)
pin goes to “H”. DZF1(DZF2) pin immediately goes to “L” if input data of any channels in the group 1(group 2) is not
zero after going DZF1(DZF2) “H”.
DZFM
AOUT
L2 R2
Mode
2
0
0
0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
L1
R1
L3
R3
0
1
2
3
4
5
6
7
DZF1 DZF1 DZF1 DZF1 DZF1 DZF1
DZF1 DZF1 DZF1 DZF1 DZF1 DZF2
DZF1 DZF1 DZF1 DZF1 DZF2 DZF2
DZF1 DZF1 DZF1 DZF2 DZF2 DZF2
DZF1 DZF1 DZF2 DZF2 DZF2 DZF2
DZF1 DZF2 DZF2 DZF2 DZF2 DZF2
DZF2 DZF2 DZF2 DZF2 DZF2 DZF2
disable (DZF1=DZF2 = “L”)
Default
Table 8. Zero detect control
P/S pin
“H” (parallel mode)
DZFE pin
“L”
OVFE bit
disable
disable
“0”
DZF mode
Mode 7
Mode 0
Selectable
Selectable
Mode 0
DZF1 pin
“L”
AND of 6ch
Selectable
Selectable
AND of 6ch
AND of 6ch
DZF2/OVF pin
“L”
“L”
Selectable
OVF output
“L”
“H”
“L”
“L” (serial mode)
“1”
“0”
“1”
“H”
Mode 0
OVF output
Table 9. DZF1-2 pins outputs
MS0056-E-00
2000/10
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AKM [ ASAHI KASEI MICROSYSTEMS ]
