[AK4480]
■ Audio Interface Format
[1] PCM Mode
Data is shifted in via the SDATA pin using BICK and LRCK inputs. Eight data formats are supported and selected by the
DIF2-0 pins (Parallel control mode) or DIF2-0 bits (Serial control mode) as shown in Table 14. In all formats the serial
data is MSB-first, 2's compliment format and is latched on the rising edge of BICK. Mode 2 can be used for 20-bit and
16-bit MSB justified formats by zeroing the unused LSBs.
Mode
DIF2
DIF1
DIF0
Input Format
BICK
≥ 32fs
≥ 48fs
≥ 48fs
≥ 48fs
≥ 48fs
≥ 64fs
≥64fs
≥ 64fs
Figure
Figure 1
Figure 2
Figure 3 (default)
Figure 4
Figure 2
Figure 5
Figure 6
Figure 7
0
1
2
3
4
5
6
7
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
16bit LSB justified
20bit LSB justified
24bit MSB justified
24bit I2S Compatible
24bit LSB justified
32bit LSB justified
32bit MSB justified
32bit I2S Compatible
Table 14. Audio Interface Format
LRCK
0
1
10
11
12
13
14
15
0
1
10
11
12
13
14
15
0
1
BICK
(32fs)
SDATA
Mode 0
15 14
6
5
4
3
2
1
0
0
15 14
6
5
4
3
2
1
0
0
15 14
0
1
14
15
16
17
31
0
1
14
15
16
17
31
0
1
BICK
(64fs)
SDATA
Mode 0
Don’t care
15 14
Don’t care
15 14
15:MSB, 0:LSB
Lch Data
Rch Data
Figure 1. Mode 0 Timing
LRCK
0
1
8
9
10
11
12
31
0
1
8
9
10
11
12
31
0
1
BICK
(64fs)
SDATA
Mode 1
Don’t care
Don’t care
Don’t care
19
0
0
19
0
0
19:MSB, 0:LSB
SDATA
Mode 4
Don’t care
23 22 21 20 19
23 22 21 20 19
23:MSB, 0:LSB
Lch Data
Rch Data
Figure 2. Mode 1/4 Timing
MS1146-E-03
2012/01
- 21 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
