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AK4372 参数 Datasheet PDF下载

AK4372图片预览
型号: AK4372
PDF下载: 下载PDF文件 查看货源
内容描述: DAC内置有PLL和HP- AMP [DAC with built-in PLL & HP-AMP]
分类和应用:
文件页数/大小: 62 页 / 1025 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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[AK4372]
ANALOG CHARACTERISTICS
(Ta=25°C; AVDD=DVDD=2.4V, VSS1=VSS2=0V; fs=44.1kHz; EXT mode; BOOST OFF; Slave Mode; Signal
Frequency =1kHz; Measurement band width=20Hz
20kHz; Headphone-Amp: Load impedance is a serial connection
with R
L
=16Ω and C
L
=220μF. (Refer to
unless otherwise specified)
Parameter
min
typ
max
Units
24
bit
DAC Resolution
-
-
Headphone-Amp:
(HPL/HPR pins) (Note
8)
Analog Output Characteristics
THD+N
-
dB
−3dBFS
Output, 2.4V, Po=10mW@16Ω
−50
−40
-
-
dB
0dBFS Output, 3.3V, Po=40mW@16Ω
−20
82
90
-
dB
D-Range
−60dBFS
Output, A-weighted, 2.4V
-
92
-
dB
−60dBFS
Output, A-weighted, 3.3V
S/N
A-weighted, 2.4V
82
90
-
dB
A-weighted, 3.3V
-
92
-
dB
Interchannel Isolation
60
80
-
dB
DC Accuracy
Interchannel Gain Mismatch
-
0.3
0.8
dB
Gain Drift
-
200
-
ppm/°C
Load Resistance (Note
9)
16
-
-
Ω
Load Capacitance
-
-
300
pF
1.04
1.16
1.28
Vpp
Output Voltage
−3dBFS
Output (Note
0dBFS Output, 3.3V,
-
0.8
-
Vrms
Po=40mW@16Ω
Output Volume:
(HPL/HPR pins)
Step Size
0.1
1.5
2.9
dB
0
–30dB
(HPG1-0 bits = “00”)
0.1
3
5.9
dB
–30
–63dB
Gain Control Range
Max (ATT4-0 bits = 00H)
-
0
-
dB
(HPG1-0 bits = “00”)
Min (ATT4-0 bits = 1FH)
-
-
dB
−63
Stereo Line Output:
(LOUT/ROUT pins, R
L
=10kΩ) (Note
Analog Output Characteristics:
THD+N (0dBFS Output)
-
dB
−60
−50
S/N
A-weighted, 2.4V
80
87
-
dB
A-weighted, 3.3V
-
90
-
dB
DC Accuracy
Gain Drift
-
200
-
ppm/°C
Load Resistance (Note
9)
10
-
-
Load Capacitance
-
-
25
pF
Output Voltage (0dBFS Output) (Note
1.32
1.47
1.61
Vpp
Output Volume:
(LOUT/ROUT pins)
Step Size
1
2
3
dB
Gain Control Range
Max (ATTS3-0 bits = FH)
-
0
-
dB
(LOG1-0 bit = “0”)
Min (ATTS3-0 bits = 0H)
-
-
dB
−30
Note 8. DALHL=DARHR bits = “1”, LINHL=RINHL=MINHL=LINHR=RINHR=MINHR bits = “0”.
Note 9. AC load.
Note 10. Output voltage is proportional to AVDD voltage. Vout = 0.48 x AVDD(typ)@−3dBFS.
Note 11. DALL=DARR bits = “1”, LINL=RINL=MINL=LINR=RINR=MINR bits = “0”
Note 12. Output voltage is proportional to AVDD voltage. Vout = 0.61 x AVDD(typ)@0dBFS.
MS0684-E-02
-7-
2008/12